Surge Suppression Circuits

In the previous article we briefly explained surges that occur in gate-source voltages. From this article, we address measures to deal with surge occurrences. We begin by presenting surge suppression circuits.

Surges occurring in gate-source voltages have already been explained in detail in the previously mentioned “SiC MOSFETs: Behavior of Gate-Source Voltage in a Bridge Configuration” in the Applications Edition of the Tech Web Basic Knowledge section on SiC Power Devices, and should be referenced as necessary.

Surge Suppression Circuits

As explained in the previous article, positive surges in the gate-source voltage (V_GS) occur on both switching and non-switching sides, but surges are especially problematic when they occur on the non-switching side (HS: high side) during LS (low side) turn-on (phenomena II). The waveform diagram on the right is the same as one presented in the previous article.

The reason for this is that, because the switching side is already in the turned-on state, if a positive voltage surge on the non-switching side has exceeded the gate threshold voltage (V_GS(th)) of the SiC MOSFET, simultaneous HS and LS turn-on occurs, and a shoot-through current flows.

However, the transconductance of SiC MOSFETs is at least an order of magnitude lower than that of Si-based MOSFETs, and so sudden excessive shoot-through currents do not flow. Consequently, even if a shoot-through current had been flowing, cooling performance is sufficient, and if the T_j(max) of the MOSFET is not exceeded, there should essentially be no problems. Even so, shoot-through currents are factors directly detracting from the efficiency of the system as a whole, and cannot be called a desirable state of affairs. Hence a circuit should be added in order to suppress any voltage surges so that insofar as possible they do not exceed the V_GS(th) of an SiC MOSFET.

Below, examples of such a suppression circuit are shown. These circuit diagrams are of circuits for surge suppression that are added onto general SiC MOSFET driving circuits. Suppression circuit (a) is a circuit for when a VEE2 power supply for driving turn-off is used; suppression circuit (b) is an example of a suppression circuit when a VEE2 is not used. In both circuits, VCC2 is the power supply to drive turn-on, OUT1 is the SiC MOSFET on/off signal, OUT2 is the mirror clamp control signal, and GND2 is the driving circuit ground.

The table below indicates the functions of an add-on suppression circuit. The components shown in red in the above circuit diagrams are added.

Normally D2 and D3 absorb pulses several tens of nanoseconds in length; because as low a voltage as possible must be used for clamping, Schottky barrier diodes (SBDs) are used. Using components with a bottom electrode type low-impedance package, such as the SOD-323FL, is even more effective.

From the next article, further details will be explained.