Troubleshooting ②： Case When Secondary-Side MOSFET Turns On Due to Resonance Under Light Loading

In the previous article, a countermeasure was described for “a case when a secondary-side MOSFET suddenly turns OFF” as Problem ①. In that article it was also indicated that there are points to be noted regarding this countermeasure. Here, these points regarding the countermeasure are explained.

Problem ②： Case When Secondary-Side MOSFET Turns ON Due to Resonance Under Light Loading

The circuit diagram below is the same as that appearing in the previous article; as Countermeasure ①-1 to prevent erroneous turn-on of the secondary-side MOSFET, it shows the addition of a ferrite bead and the adjustment (increase) of the filter resistor R1. However, if when using this countermeasure the value of R1 is too high, the secondary-side MOSFET may be erroneously turned on during light loading. The mechanism by which this occurs is explained using the diagram on the lower right.

• 1： Because the value of R1, which determines the turn-off timing, is too high, detection of the DRAIN pin voltage is delayed, and V_GS2 does not go low.
• 2： I_FET2 is in a backflow state until V_GS2 goes low.
• 3： The backflowing I_FET2 accumulates to turn off the secondary-side MOSFET, and consequently the V_DS2 resonance amplitude increases.
• 4： V_DS2 again becomes a negative voltage, and V_GS2 goes high (the secondary-side MOSFET is erroneously turned on)
• 5： As in 2 above, I_FET2 backflows, and 3, 4, 5 are repeated.

Countermeasures

To address Problem ②, there are four countermeasures. However, just as this Problem ② occurs as a consequence of the countermeasure for Problem ①, there are tradeoffs to be considered for each of these countermeasures. Because there are four different options, we begin by summarizing them and related points to consider.

* Numbers “②-n” are used for countermeasures to indicate that they are meant to address Problem ②.

●Countermeasure ②-1： Decrease the value of the DRAIN pin-connected resistor R1
By decreasing the value of the filter resistor R1, the resonance amplitude of V_DS2 is lowered, and operation in which the secondary-side MOSFET is erroneously turned on can be prevented. As a countermeasure for Problem ①, the method of increasing the value of R1 was described; but if R1 is increased too much, or if the initially selected value is too high, the value of R1 should be reconsidered and adjusted to a lower value.

* Point to be noted: If the value of R1 is decreased too much, the noise filtering effect is also decreased, and so noise occurring in the DRAIN pin voltage may cause a reversion to the state of Problem ① in which the secondary-side MOSFET suddenly turns off. If these countermeasures keep canceling each other out, a different countermeasure should be tried.

●Countermeasure ②-2： Change to a model (IC) with a long compulsion off time
By forcing the secondary-side MOSFET off for a time longer than one resonance period after the secondary-side MOSFET turns off (the interval during which erroneous turn-on occurs), it is possible to mask erroneous turn-on operation.

As explained in “IC Used in Design“, the BM1R001xxF series of power supply ICs used in this design case study are a series of pin-compatible devices with different compulsion off times. Five models, the BM1R00146F to BM1R00150F, have been made available, so that a compulsion off time can be selected based on the conditions of the circuit for synchronous rectification using a mask time to prevent Problem ②, that is, the erroneous turn-on of the secondary-side MOSFET by the resonance waveform occurring at the DRAIN pin.

In this case study, the BM1R00147F, with a compulsion off time of 2 μsec (typ.), was selected; but as the above-described countermeasure, here an example is presented in which the BM1R00149F, with a longer compulsion off time of 3.6 μsec (typ.), is used.

* Point to be noted: If the compulsion off time is made too long, the timing at which the secondary-side MOSFET turns on during heavy loading is delayed by this compulsion off time, and so the operation under heavy loading must be confirmed. The following is only an example, but shows waveforms for a case in which the turn-on timing is delayed when using the BM1R00150F with a compulsion off time of 4.6 μsec that is too long for this design, and for a case in which the BM1R00149F, with an appropriate masking effect and off time, is used.

●Countermeasure ②-3: Add a snubber circuit between the drain and source of the secondary-side MOSFET
By adding a snubber circuit consisting of Rsnb and Csnb between the drain and source of the secondary-side MOSFET, as shown below, the amplitude of V_DS2 is attenuated.

* Point to be noted: In the range in which resonance operation occurs (from no load to intermediate loads), addition of a snubber circuit results in an increase in standby power, and efficiency worsens. Hence operation must be studied and confirmed.

●Countermeasure ②-4： Decrease the transformer windings ratio Ns/Np
By changing the transformer windings ratio, the amplitude of V_DS2 can be attenuated.

* Point to be noted: As indicated in the waveform diagram, the primary-side MOSFET V_DS1 increases, so that the V_DS voltage margin of the primary-side MOSFET decreases. The transformer windings ratio must be set considering the need to keep V_DS1 from exceeding the withstand voltage.