Gate Charge Losses in a Synchronous Rectifying Step-Down Converter


Points of this article

・Gate charge losses are losses arising from the Qg (total gate charge) of a MOSFET.

・If the MOSFET Qg is the same, the losses depend mainly on the switching frequency.

In this article, we consider losses relating to driving of the gate of a MOSFET power switch. In the following diagram, the parts labeled “PGATE” of the high-side and low-side switches are relevant.

Gate Charge Losses

Gate charge losses are losses that, in this example, are due to the Qg (total gate charge) of external MOSFETs. They occur because, when a MOSFET is switched, the gate driver in the power supply IC charges the parasitic capacitance of the MOSFET (injects charge into the gate) (see the diagram below). This is an issue for study in all applications that use MOSFETs as power switches, regardless of the switching power supply.

Losses are equal to the product of the MOSFET Qg, the driver voltage, and the switching frequency. For Qg, the data sheet for the MOSFET being used can be consulted. The driver voltage can be actually measured, or the IC data sheet can be consulted.

From this equation we see that if Qg is the same, losses are greater for higher switching frequencies. Insofar as the VGS required by the MOSFET is being supplied, the driver voltage does not change much with the circuit or the IC. The MOSFET selection and determination of the switching frequency will vary depending on the circuit design, and must be studied carefully.

In order to maintain compatibility with other sections, we have presented switching waveforms, but gate charge losses cannot be shown.

In the next article, losses due to inductor DCR will be considered.

【Download Documents】Basic of Linear Regulators and Switching Regulators

Basic studies for linear regulators and switching regulators as a DC-DC converter.