Problem ① "Case When Secondary-Side MOSFET Suddenly Turns OFF" and problem ② “Case When Secondary-Side MOSFET Turns ON Due to Resonance Under Light Loading” are followed by explanation of countermeasures and points to be noted for problem ③, "Case in which a surge causes VDS2 to rise above the rated VDS of the secondary-side MOSFET".
Problem ③： Case When, Due to Surge, VDS2 Rises to Above Secondary-Side MOSFET VDS Voltage
To address this problem ③ there are three countermeasures; but, similarly to the cases of problems① and ②, for each countermeasure there are tradeoffs that must be considered. We begin by listing the countermeasures and points to be noted for each.
|Problem ③: Case When, Due to Surge, VDS2 Rises to Above Secondary-Side MOSFET VDS Voltage|
|Countermeasure||Points to be Noted|
Insert a capacitance between the drain and source of the secondary-side MOSFET
|In the region where resonance occurs (no load to light loading), insertion of a capacitance worsens efficiency, and so characteristics must be checked.|
Increase the gate resistance value of the primary-side MOSFET
|Upon increasing the gate resistance value, the efficiency is worsened, and there is the possibility of heat generation by the primary-side MOSFET M1, so again characteristics must be checked.|
Reduce the windings ratio Ns/Np of the transformer to lower VDS2
|Here it is the VDS1 of the primary-side MOSFET that increases, and so the transformer windings ratio should be adjusted such that VDS1 does not exceed the VDS rating for the primary-side MOSFET M1.|
※ Numbers "③-n" are used for countermeasures to indicate that they are meant to address Problem ③.
●Countermeasure ③-1: Insert a capacitance between the drain and source of the secondary-side MOSFET
By inserting a capacitor CDS2 as the capacitance between the drain and source of the secondary-side MOSFET, overshoot of VDS2 is smoothed. CDS2 should have a value in the range 1000 pF to 6800 pF or so (reference values), but the capacitance ultimately used should be selected while checking the effect of the countermeasure. The figure below shows the place at which CDS2 is inserted in the circuit diagram and the resulting waveform.
※Point to be noted: In the region in which resonance occurs (no load to light loads), an inserted capacitance causes the efficiency to be worsened, and so characteristics must be checked in order to find a point of compromise between smoothing of the overshoot and the operating efficiency.
●Countermeasure ③-2: Increase the gate resistance value of the primary-side MOSFET
By increasing the gate resistance RGATE1 of the primary-side MOSFET and slowing the rise time (blunting the rise) of VGS1, surges due to sharp voltage rises are suppressed, and overshoot of the secondary-side VDS2 can be subdued. The figure below shows the inserted RGATE1 and a waveform diagram showing the result. Values of RGATE1 range from about 10 to 470 Ω (reference values).
※Point to be noted: Upon increasing the value of RGATE1, efficiency may be degraded, or heat generation may occur in the primary-side MOSFET M1, so characteristics must be confirmed. Here too, adjustments must be made that consider the tradeoff between reducing the overshoot and the consequences for efficiency and heat generation.
●Countermeasure ③-3: Reduce the windings ratio Ns/Np of the transformer to lower VDS2
By reducing the windings ratio of the transformer, the amplitude of VDS2 is attenuated.
※Point to be noted: VDS2 is attenuated, but on the other hand the VDS1 of the primary-side MOSFET increases (see the diagram of the waveform after countermeasure implementation). Hence the transformer windings ratio must be adjusted such that VDS1 does not exceed the VDS rating of the primary-side MOSFET M1.
This concludes our discussion of examples of problems that may occur, and countermeasures and important points relating to these problems.
・Because the secondary side of a conventional isolated flyback converter is being replaced, it is extremely important that the actual operation be verified.
・There are cases in which surges may cause VDS2 to exceed the rated VDS of the secondary-side MOSFET; to deal with this, three countermeasures are available.
1) Insert a capacitance between the drain and source of the secondary-side MOSFET
2) Increase the gate resistance value of the primary-side MOSFET
3) Reduce the windings ratio Ns/Np of the transformer to lower VDS2
・There are tradeoffs to be considered for each of these countermeasures.