2020.08.05 SiC Power Device
As part of our examination of " SiC MOSFET: Behavior of Gate-Source Voltage in Bridge Configuration", in this article we explain the bridge configuration that is assumed and its operation.
SiC MOSFET Bridge Configuration
The circuit below is the simplest synchronous boost circuit that uses MOSFETs in a bridge configuration. The high-side (HS) and low-side (LS) SiC MOSFETs used in this circuit are turned on in alternation, and in order to prevent the simultaneous turn-on of both the HS and LS devices, a dead time is set, during which both the HS and the LS MOSFETs are turned off. The waveforms on the lower right indicate the timing of the gate signals (VG).
The approximate waveform shapes of the drain-source voltage (VDS) and the drain current (ID) of the HS and LS MOSFETs in this circuit are shown below. These waveforms assume a so-called hard-switching state, in which the current of the inductor L produces continuous operation.
The horizontal axis represents time; the time periods Tk (k=1 to 8) are defined as follows.
The discussion beginning in the next article will assume the above, and so the operation of this bridge circuit, and the voltage and current waveforms, should be thoroughly grasped.
・In examining" SiC MOSFET: Behavior of Gate-Source Voltage in Bridge Configuration", the simplest synchronous boost circuit, using MOSFETs in a bridge configuration, is used as an example.
・The configuration and operation of the example circuit, and the voltage and current waveforms, should be understood.