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Important Points in the Design of a Power Supply Using a Linear RegulatorSoft Starting of a Linear Regulator IC

2025.01.22

Soft Starting of a Linear Regulator IC

The maximum value of the inrush current flowing to charge the output capacitor can be suppressed by gradually ramping up the output voltage in a fixed time during turn-on of the input power supply (startup). This is the main reason for using a soft start.

The soft start rise time for the BDxxIC0 series of ICs is internally fixed at 800 µs (typ.); the rise time cannot be adjusted externally. The soft start time TSS is defined as the time from the point when EN turns on from Low to High until the output voltage reaches 95% of the specified value, as shown in the figure below. There is variation in the soft start time; reference values are 400 µs minimum, 800 µs typical, and 1200 µs maximum. The soft start time does not depend on the output voltage. Note that the startup time may vary depending on the rise times of the input power supply voltage and EN signal, and output capacitor value; for details, refer to the article “Power Supply Turn-on Sequence”.

Definition of soft start time

Power Supply Turn-on Sequence for a Linear Regulator

For the BDxxIC0 series, the order of the voltage rise (application of voltage) of VCC and EN does not matter, but the startup time varies depending on the rise times of VCC and EN, and on the value of the output capacitor. Startup characteristics are described for each of the following four conditions.

  • ・When first VCC, then EN turns on
  • ・When first EN, then VCC turns on
  • ・When VCC and EN turn on simultaneously
  • ・When the output capacitor value is large

When first VCC, then EN turns on

When EN turns on steeply/When EN turns on before soft start time expires/When EN turns on after soft start time expires

The diagram on the left is the startup characteristic when EN is steeply turned on after VCC has risen. VOUT rises gradually due to the soft start function. As also explained in “Soft Starting”, the soft start time TSS is defined as the time from the point when EN turns on from Low to High until the output voltage reaches 95% of the specified value.

The center diagram is the startup characteristic when the time for EN to reach high level is made shorter than the soft start time. Soft start operation begins when the EN voltage has exceeded a threshold value, and the output voltage rises according to the preset soft start time.

The final diagram on the right is the startup characteristic when the time for EN to reach high level is made longer than the soft start time. Soft start operation begins when the EN voltage has exceeded the threshold value, and the output voltage rises according to the preset soft start time.

Under any of these conditions, soft start begins when the EN voltage passes the threshold value, and is essentially unaffected by the timing at which the EN voltage reaches high level. It may be assumed that, in a case where the EN voltage rise is steep, the time for the EN voltage to rise and pass the threshold value to reach high level is extremely short.

When first EN, then VCC turns on

When VCC turns on steeply/When VCC turns on before soft start time expires/When VCC turns on after soft start time expires

The diagram on the left is the startup characteristic when VCC is steeply turned on after EN has risen. Soft start operation begins when VCC has risen, and the output voltage gradually rises according to the preset soft start time.

The center diagram is the startup characteristic when the time for VCC to reach the power supply voltage is made shorter than the soft start time. Soft start operation begins when VCC has passed approx. 1.2 V, and the output voltage rises according to the preset soft start time.

The diagram on the right is the startup characteristic when the time for VCC to reach the power supply voltage is made longer than the soft start time. Soft start operation begins when VCC has exceeded approx. 1.2 V, and the output begins to rise. However, because the speed at which the VCC voltage rises is slower than the speed of the soft start voltage rise, the rise of the output voltage VOUT is limited by the VCC voltage value. Hence the startup time (the time until the output reaches the preset value) is longer, exceeding the soft start time.

In all the cases, soft start begins when VCC exceeds 1.2 V. But it should be kept in mind that, if the VCC voltage is not greater than the preset output voltage plus the input-output voltage difference required for operation, the output will not reach the preset voltage value.

When VCC and EN turn on simultaneously

When VCC and EN turn on steeply/When VCC and EN turn on before soft start time expires/When VCC and EN turn on after soft start time expires

The diagram on the left is the startup characteristic when VCC and EN are steeply turned on simultaneously. Soft start operation begins when VCC and EN have risen, and the output voltage rises according to the preset soft start time.

The center diagram is the startup characteristic when VCC and EN have risen in a shorter time than the soft start time. Soft start operation begins when the EN voltage has exceeded a threshold value, and the output voltage rises according to the preset soft start time.

The diagram on the right is the startup characteristic when VCC and EN have risen in a longer time than the soft start time. Soft start operation begins when the EN voltage has exceeded a threshold value, and the output begins to rise. However, because the speed at which the VCC voltage rises is slower than the speed of the soft start voltage rise, the rise of the output voltage VOUT is limited by the VCC voltage value. Hence the startup time (the time until the output reaches the preset value) is longer, exceeding the soft start time.

When the output capacitor value is large

As the output capacitor value is increased, the charging current during startup also increases. For output capacitances ranging from several µF up to a few hundred µF, the charging current varies but the soft start time is constant, although there is some variation depending on the output voltage and limit values of the overcurrent protection circuit. When the output capacitance is more than a few hundred µF, the overcurrent protection circuit is activated due to the increase in the charging current, and so the charging current is limited by the overcurrent protection circuit. As a result, the startup time becomes longer, exceeding the soft start time, as indicated by the graph in the lower-left diagram. Under this condition, the startup time becomes longer as the output capacitance is increased.

The lower-right diagram shows that the IC starts up with the current limited by the overcurrent protection circuit until the halfway point, and thereafter, when capacitor charging has to some extent been completed, the overcurrent protection is canceled because the charging current is reduced, and normal operation is resumed. Thus the output startup time varies depending on the value of the output capacitor. Hence when an output capacitor with a large value is used, the startup time under actual operating conditions should be checked.

When started with current limited by the overcurrent protection circuit/When started with current limited by the overcurrent protection circuit until halfway through

Power Supply Turn-off Sequence for a Linear Regulator

For the BDxxIC0 series, the output voltage fall time differs depending on the order in which VCC and EN are turned off. The differences for the three following conditions are explained.

  • ・When first EN, then VCC turns off
  • ・When first VCC, then EN turns off
  • ・When VCC and EN turns off simultaneously

When first EN, then VCC turns off

When EN turns off steeply/When EN turns off gradually

The diagram on the left is the turn-off characteristic for the output VOUT when EN is turned off steeply. When EN is turned off the output transistor turns off, and so the supply of charge from input to output halts. The charge on the output capacitor is discharged by the load, and the output voltage falls. Another discharge path besides the load is the feedback resistors (output voltage setting resistors). After the output voltage has fallen completely, VCC is turned off. When the load is a simple resistor, the output voltage fall time can be calculated using the following equation.

\(T_{OFF} = -C_O \cdot R_L \cdot \ln\left(\frac{V_C}{V_O}\right) \, {[sec]}\)

CO : Output capacitor [F]
RL : Load resistance [Ω]
VO : Output voltage [V]
VC : Final dropped voltage [V]

The diagram on the right is the output turn-off characteristic when EN is gradually turned off. When the EN voltage has fallen below a threshold value, the output transistor turns off, and the output voltage begins falling. The output voltage fall time can similarly be calculated using the equation indicated above.

When first VCC, then EN turns off

When VCC turns off steeply/When VCC turns off gradually/When VCC is gradually turned off, and EN is turned off while VCC is falling

The diagram on the left is the power supply turn-off characteristic when VCC is turned off steeply. When VCC turns off steeply, the levels of the input voltage and the output voltage are inverted, and so the charge on the output capacitor is discharged through the body diode (parasitic diode) of the output transistor to the input side. Hence the output voltage falls steeply following the input voltage, and when VCC reaches 0 V, the fall slows down, with the body diode forward voltage (approx. 0.5 V) remaining. Thereafter the output voltage falls according to the time constant of the load resistance.

The center diagram is the power supply turn-off characteristic when VCC is gradually turned off. When the VCC voltage falls to the point where the levels of the input and output voltages are inverted, the charge on the output capacitor is discharged through the body diode (parasitic diode) of the output transistor to the input side. Hence the output voltage falls following the input voltage, and when VCC reaches 0 V, the fall becomes more gradual, with the body diode forward voltage (approx. 0.5 V) remaining. Thereafter the output voltage falls according to the time constant of the load resistance.

The diagram on the right is the power supply turn-off characteristic when EN is turned off steeply during VCC gradual turn-off. When the VCC voltage falls to the point where the levels of the input and output voltages are inverted, the charge on the output capacitor is discharged through the body diode (parasitic diode) of the output transistor to the input side. Hence the output voltage falls following the input voltage. When EN is turned off steeply during the fall of the VCC voltage, the output transistor turns off, but because the levels of the input and output voltages are inverted, the output voltage continues to fall following the input voltage. However, the greater the value of the load current, the faster is the fall. When VCC reaches 0 V, the fall becomes more gradual, with the body diode forward voltage (approx. 0.5 V) remaining. Thereafter, the output voltage falls according to the time constant of the load resistance.

When VCC and EN turns off simultaneously

When VCC and EN turn off steeply/When VCC and EN turn off gradually

The figure on the left is the power supply turn-off characteristic when VCC and EN are steeply turned off simultaneously. When VCC turns off steeply, the levels of the input voltage and the output voltage are inverted, and so the charge on the output capacitor is discharged through the body diode (parasitic diode) of the output transistor to the input side. Hence the output voltage falls steeply following the input voltage, and when VCC reaches 0 V, the fall slows down, with the body diode forward voltage (approx. 0.5 V) remaining. Thereafter the output voltage falls according to the time constant of the load resistance.

The figure on the right is the power supply turn-off characteristic when VCC and EN are gradually turned off simultaneously. When the VCC voltage falls to the point where the levels of the input and output voltages are inverted, the charge on the output capacitor is discharged through the body diode (parasitic diode) of the output transistor to the input side. Hence the output voltage falls following the input voltage, and when VCC reaches 0 V, the fall becomes more gradual, with the body diode forward voltage (approx. 0.5 V) remaining. Thereafter the output voltage falls according to the time constant of the load resistance.

Inrush Current of Linear Regulator ICs

This article discusses inrush currents, which also appeared in explanations of “Soft starting” and “Power supply turn-on sequences”.

Upon startup, an inrush current flows to charge the output capacitor. In such cases, even if the output current exceeds the maximum value of the recommended operating range, the current is limited by the overcurrent protection (OCP) circuit, so that no problems in operation occur. However, it must be confirmed that the junction temperature TJ does not exceed 150°C due to an overcurrent. The junction temperature resulting from a short-duration overcurrent can be estimated from the following equation, which uses the transient thermal resistance ZTH.

\(T_j = T_A + Z_{TH} \times P \, \text{[℃]}\)

TA : Ambient temperature [℃]
ZTH : Transient thermal resistance [℃/W] between junction and ambient environment
P : IC power consumption [W]

Here P, the IC power consumption, can be calculated using the equation below.

\(P = (V_{CC} – V_{OUT}) \cdot I_{OUT} + (V_{CC} \cdot I_{CC}) \, \text{[W]}\)

In cases where IOUTICC, the following equation can be used.

\(P = (V_{CC} – V_{OUT}) \cdot I_{OUT} \, \text{[W]}\)

VCC : Input voltage [V]
VOUT : Output voltage [V]
IOUT : Output current [A]
ICC : IC circuit current [A]

In the HTSOP-J8 package, assuming that a 2 A inrush current flows for 1 ms at TA =60°C, the transient thermal resistance at 1 ms is 5°C/W, as can be read from the following graph.

Transient thermal resistance of the HTSOP-J8 package

An estimate of the junction temperature TJ can then be calculated from the equation below using this transient thermal resistance.


\(T_j = T_A + Z_{TH} \cdot P\)
\( = 60\,^\circ C + 5 \times (5V – 3.3V) \times 2A = 77.0\,^\circ C\)

The junction temperature TJ is below 150°C, indicating no problems. Thus, the rise in TJ is small when the inrush current persists for a short time of 1 ms or so, and consequently it is rare for the temperature rise caused by an inrush current to pose a problem; nevertheless, a check should always be performed.

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