Power Supply Sequence Specification ①: Power Supply Sequence Specifications and Control Block Diagrams

To begin with, the specifications of power supply sequencing to be implemented are confirmed, and before designing the actual circuit, control blocks are used to examine the circuit configuration. Two examples of power supply sequence specifications have been prepared; we begin with the first of these, “Power Supply Sequence Specification ①”.

Power Supply Sequence Specification ①

In specification ①, sequencing of a power supply with three supply voltages is controlled. Specifications for the input and output voltages and the power supply configuration are shown below.

In this design, three power supply ICs are used. As the power supply ICs, switching regulators (DC-DC converters) or linear regulators (LDOs) are assumed. Among the functions of the power supply ICs, an enable pin for output on/off control is necessary.

Control Block Diagram①

The control block diagram to implement the sequence specification ① is shown below.

In order to realize the sequence specification ①, in addition to three power supply ICs, four Power Good functions, three Discharge functions, as well as resistors and diodes are needed; these are shown in the control block diagram. A block diagram is used to represent functions and operations as blocks, and so the ICs and circuit components actually required in the circuit are omitted. Below, these functions and their roles are explained.

• ・DCDC 1, DCDC 2, and DCDC 3 are separate power supply ICs; the output of each is controlled through an enable (EN) pin.
• ・The Power Good 1 and 2 functions monitor the output voltages of the DCDC ICs during power turn-on, and upon reaching a target voltage, output a “High” signal (hereafter “H”) to the next DCDC IC to be started.
• ・The Power Good 3 and 4 functions monitor the output voltages of the DCDC ICs during power shutoff, and upon reaching a target voltage, output a “Low” signal (hereafter “L”) to the next DCDC IC to be shut off.
• ・The Discharge blocks cause the power supply sequence to operate normally by rapidly discharging the electric charge that has been stored in the output capacitors of the DCDC ICs during shutoff, causing the output voltage to drop.

In the block diagram, positive-logic designs are used for the EN and V_OUT of the DCDC blocks, the IN and PGOOD of the Power Good blocks, and the IN and OUT of the Discharge blocks. In other words, at “H” level the DCDC ICs are in the enabled state, the Power Good blocks have reached the target voltage, and the Discharge block outputs are turned on. Also, the PGOOD pins (outputs) of the Power Good blocks and the OUT pins of the Discharge blocks are open-collector or open-drain.