This concludes our extended discussion of "Examination of Losses" in the DC/DC Converter Evaluation edition, spanning ten articles. We have separated the locations of losses in a synchronous rectifying step-down converter, and described methods for calculating each of the losses and for deriving overall losses from the sum of the individual losses. We have also explained thermal calculations when selecting a package, loss factors to consider when changing the switching frequency, input voltage, or output current, and other issues of practical importance for examining losses. High efficiency, which is to say low losses, is an essential requirement for power supplies, and so it is hoped that the above information will be found useful for power supply design. Below, the key points for each of the articles are summarized.
Examination of Losses
・Losses immediately produce heat, detracting from the reliability of components and devices.
・Thermal design is extremely important for improving the safety and reliability of devices.
・The parts of a power supply circuit that involve losses, the reasons for the losses, and countermeasures must be studied.
・Losses are the difference between the input power and the output power, or the reciprocal of the efficiency.
・The junction temperature is the ambient temperature plus heat generation, where heat generation is losses × thermal resistance (θj-a).
・Losses are converted into heat, and therefore are an important subject for study.
・The loss in a synchronous rectifying step-down converter is the sum of the losses of the various components.
・Conduction losses of a MOSFET of a synchronous rectifying step-down converter are calculated using the ON-resistance, the current while turned on, and the on-time.
・The switching loss in a synchronous rectifying step-down converter is calculated using the switching transition time, the power during this transition time, and the switching frequency.
・The dead time loss is the loss that occurs due to the load current and the forward voltage of the low-side switch (MOSFET) body diode during dead time.
・The dead time is provided intentionally in order to prevent through-currents flowing through synchronous switches.
・Losses due to power consumption by the controller IC itself greatly affect the efficiency at a light load.
・Loss calculations are extremely simple, being the product of the power supply current and the power supply voltage.
・For measurement conditions, the data sheet for the IC should be referenced.
・Gate charge losses are losses arising from the Qg (total gate charge) of a MOSFET.
・If the MOSFET Qg is the same, the losses depend mainly on the switching frequency.
・Conduction losses occur due to the inductor DCR (DC resistance) and the output current.
・Power losses for a power supply IC are the total of the losses in various places.
・There are various approaches where the values used in calculations are concerned, but losses under worst-case conditions should be used in calculations.
・When the data sheet for a power supply IC provides an efficiency curve, the loss can be calculated from the efficiency by a simple procedure.
・Losses are determined for use in thermal design.
・Heat dissipation measures are taken in order that Tj does not exceed the absolute maximum rating.
・Losses are determined in order to perform heat calculations.
・Heat dissipation measures are taken so as to ensure that Tj does not exceed the absolute maximum rating.
・Losses at specific places that make up the overall circuit losses are increased depending on the operating conditions.
・By understanding the loss factors through the equations for the losses, it is possible to understand what points require attention when changing the specifications or the operating conditions.
・By increasing the switching frequency, the power supply and application can be made smaller, but losses increase and efficiency suffers.
・Among increasing losses, switching losses and dead time losses are dominant.
・There is a trade-off between miniaturization through higher switching frequencies and increases in losses (reduced efficiency).
・In many cases, a balance must be sought between size and efficiency.
・When the input voltage rises, the increase in switching loss dominates.
・Because the switching loss increases, MOSFET voltage ratings and allowable power dissipation must be reexamined.
・In addition, MOSFETs with faster tr and tf values and with lower on-resistance and Qg values should be considered.
・In power supply specifications, the switching frequency should be lowered if possible. If fSW is halved, the loss is also reduced by half.
・In the case of an IC with an internal switching transistor, use of the IC itself must be reconsidered.
・When the output current is increased, losses due to MOSFET on-resistances, switching, dead time, and inductor DCR increase.
・MOSFETs with low on-resistances are selected, switching is made faster, and inductors with low DCR are employed.
・In nearly all cases the controller IC dead time cannot be adjusted.
・MOSFET selection requires that matters other than on-resistance also be studied (as explained in Part 2).
・When increasing the output current, MOSFETs with low on-resistance are selected, switching speeds are raised, and low-DCR inductors are used.
・High-voltage MOSFETs with low on-resistances tend to have higher Qg values, and so in order to avoid the increase in gate charge loss that accompanies a higher Qg, MOSFETs with low on-resistance and low Qg are selected.
・Low-Qg MOSFETs tend to have faster switching speeds, and so attention must be paid to increases in switching noise.