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Power Supply Sequence Specification①: Example of Actual Operations

2022.03.30

Points of this article

・Confirm the specifications, circuit operations, and waveforms for power supply sequence ①.

In the previous article, an actual circuit example and component value calculations to make various settings for the power supply sequence specification ① were explained. Here, actual operations of the circuit are confirmed.

Power Supply Sequence Specification①: Example of Actual Operations

The circuit below is an example circuit implementing the power supply sequence ① described in the previous article. It is provided again for confirmation of the circuit operations.

Next, actual operation waveforms are presented.

In a state with V_IN of 5.0 V applied, upon setting Enable, that can turn V_OUT on and off, to “H” level, V_OUT startup begins.

Initially, DCDC 1 causes the rise of V_OUT1 to 1.2 V. This is the yellow waveform in the waveform diagram.

When V_OUT1 reaches 90% of the voltage, which is the threshold set in the Power Good block IC1, the PGOOD output enables DCDC 2, and the second output V_OUT2, 3.3 V (yellow-green), begins to rise.

When V_OUT2 similarly reaches 90%, the Power Good block IC3 enables DCDC 3, and the third output V_OUT3, 1.5 V (blue), begins to rise.

This constitutes the startup sequence operations.

Upon shutdown, operations occur starting with V_OUT3 in the opposite order from the operations on startup.

When Enable is set to “L” level, DCDC 3 is directly disabled and turned off, and simultaneously the discharge circuit turns on, and V_OUT3 is drawn down to near ground level in the programmed time period.

When V_OUT3 falls below 0.5 V, which is the threshold of the Power Good block IC4, the IC4 PGOOD output disables DCDC 2, and similarly the discharge circuit turns on and V_OUT2 is drawn down.

When V_OUT2 falls below 0.5 V, which is the threshold of the Power Good block IC2, as in the previous stage, the IC2 PGOOD output disables DCDC 1, the discharge circuit turns on, and V_OUT2 is drawn down.

With this, all three shutdown sequences end, and all outputs are turned off.

From the next article, we will explain sequence specification ②.

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